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  TA8496FL 2002-01-31 1 toshiba bipolar linear integrated circuit silicon monolithic TA8496FL magnetic head r/w ic this ic enables writing and detection of magnetic recording signals. features  operating voltage range: v cc = 3.5 to 7 v v bat = 1.8 to 7 v  output current: i out = 20 ma (max)  constant current operating function : i oc = (0.25 (v) 160 (a))/r wr (typ.) block diagram weight: 0.05 g (typ.) 30 k  v cc  v f  0.3 v amp3 amp2 head-amp com-amp wrcnt ain3 cfil a out3 3 14 10 13 h-sw control circuit aout2 15 fcnt 12 t1 16 ain2 17 hdout 18 hdfb 19 v cc 9 v ref 24 comin 8 on/off 7 r/w 6 ena 5 clk 4 a hdin 21 a com 20 v bat 2 hdin 22 com 23 wrgnd 1 rdgnd 11 control circuit 30 db 20 db 20 db 40 db filter 30 k  10 k  100 k  100 k  316 k  10 k  10 k  10 k  100 
TA8496FL 2002-01-31 2 pin function pin number symbol description 1 wrgnd gnd for write block 2 v bat high-switch control power supply 3 wrcnt write output setting pin 4 clk high-switch operation control signal input 5 ena high-switch enable signal input 6 r/w read/write select signal input 7 on/off chip enable signal input 8 comin internal reference voltage setting (fine adjustment) 9 v cc power supply input pin 10 cfil power supply filter connecting pin (c  0.1  f) 11 rdgnd gnd for read block 12 fcnt cut-off frequency setting pin 13 aout3 amp 3 output 14 ain3 amp 3 input 15 aout2 amp 2 output 16 t1 amp 2 test pin 17 ain2 amp 2 input 18 hdout head amp output 19 hdfb head amp feedback input 20 acom com amp output 21 ahdin head amp output 22 hdin write output 23 com write output 24 v ref v cc filter output (internal power supply) maximum rating (ta     25c) characteristics symbol rating unit v cc 8 v power supply voltage v bat 8 v input voltage v i 6 v output current i out 20 ma operating temperature t opr  20 to 70 c storage temperature t stg  50 to 150 c recommended operating conditions characteristics symbol rating unit v cc 3.5 to 7.0 power supply voltage v bat 1.8 to 7.0 v
TA8496FL 2002-01-31 3 functions input write unit on/off r/w ena clk com hdin read unit h h/l h/l   enable l h h l h disable l h l h l disable l l l l l disable h l l h   disable l h/l h/l h/l   disable  : high impedance electrical characteristics interface block (unless otherwise is specified, v cc     5 v, v bat     3 v, ta     25     c) characteristics symbol test circuit test condition min typ. max unit v in1-hi  ena, on/off 2.5  v cc v in1-lo  ena, on/off   1.0 v in2-hi  clk, r/w 1.5  v cc input voltage v in2-lo  clk, r/w   0.5 v i in1-hi clk, v in  5 v D 15 25 i in1-lo clk, v in  0 v   85  120 i in2-hi ena, v in  5 v  85 120 i in3-hi r/w, v in  5 v  15 25 i in3-lo r/w, v in  0 v   85  120 input current i in4-hi 1 on/off, v in  5 v  85 120  a
TA8496FL 2002-01-31 4 read block (unless otherwise is specified, v cc     5 v, v bat     3 v, ta     25     c) characteristics symbol test circuit test condition min typ. max unit i ccr when read block in operation  3.2 4.6  ma current dissipation i cco 2  when chip disabled (on/off  low or open)  0 1  a head amp g h   40  amp 2 g 2   40  gain characteristics amp 3 g 3 3   30  db e n1 r g  0  , f c  19 khz  0.33 (0.64) * head amp input conversion noise e n2 D r g  0  , f c  1.7 khz  0.15 (0.26) *  v rms reference voltage v acom 3  1.9 2.0 2.1  v head amp v hos   0.1  0.25 amp 2 v 2os  0.7  1.1 output offset voltage amp 3 v 3os 3   0.1  0.25 v low v 3ol  0.2  amp 3 output voltage range high v 3oh 4 r l  10 k   4.1  v output i 3out  2.0   amp 3 output current input i 3in 4  0.1 0.2 0.3 ma * : guaranteed by design. determined at design and does not change at manufacturing. test not conducted. write block (unless otherwise is specified, v cc     5 v, v bat     3 v, ta     25     c) characteristics symbol test circuit test condition min typ. max unit i ccw during write, clk  low/high  3.7 5.2 i cce when write enabled  1.9 2.8 i ccb when write in break  4.4 6.1 i bat during write, reactive current (r wr  5 k  )  1.4 1.8 i bab when write in break  1.0 1.6 ma i bar during read  0 1 current dissipation i bao 2 when chip disabled (on/off  low or open)  0 1  a v bat  2.0 v 8 10 12 set output current i oc 5 i oc  10 ma (at v bat  2.0 v) v bat  5.0 v  11 13 ma t plh1 0 to 10% (note1)  0.1  t plh2 0 to 90% (note1)  0.5  t phl1 0 to 10% (note1)  0.1  clk output transfer time t phl2 6 0 to 90% (note1)  0.5   s t pzh1 0 to 10% (note1)  0.3  t pzh2 0 to 90% (note1)  0.5  t phz1 0 to 10% (note1)  0.3  ena output transfer time t phz2 6 0 to 90% (note1)  0.5   s note 1: load rl  36  , cl  10 pf
TA8496FL 2002-01-31 5 input/output circuit  clk pin  ena pin  r/w pin  on/off pin  aout3 pin v ref cl k gnd 4 50 k  1 k  1.0 v 5 v ref en a gnd 50 k  50 k  6 v ref r/w gnd 50 k  1 k  1.0 v on/off 7 v ref gnd 50 k  50 k  aout3 13 200  a v cc gnd secondly l.p.f characteristics (amp 2) control resistance (k  ) (fcnt) cut-off frequency (khz) (  3 db) 30 0.3 0.1 1 3 10 30 1 3 10 100
TA8496FL 2002-01-31 6 test circuit 1. input current (i in1 , i in2 , i in3 , i in4 ) v cc v bat hdfb hdout ain2 fcnt aout2 ain3 rdgnd cfil wrcnt wrgnd acom ahdin hdin com clk ena r/w on/off TA8496FL i in1 i in2 i in3 i in4 9 2 19 18 17 12 15 14 20 21 22 23 3 1 11 10 4 5 6 7 a a a a 10 k  0.1  f 0.1  f 820 pf r wr  5 k  5 v 5 v 3 v 0.1  f r l  120 
TA8496FL 2002-01-31 7 2. current consumption (i ccr , i cco , i ccw , i cce , i ccb , i bat , i bab , i bar , i bao ) input sequence (h     5 v, l     0 v) current consumption (v cc , v bat ) on/off r/w ena clk i ccr h h l h i cco l/open h h/l h i ccw h l h h/l i cce h l l h i ccb h l l l i bat (note2) h l h h/l i bab h l l l i bar h h h/l h/l i bao l/open h/l h/l h/l note 2: sw. off v cc v bat hdfb hdout ain2 fcnt aout2 ain3 rdgnd cfil wrcnt wrgnd acom ahdin hdin com clk ena r/w on/off TA8496FL 9 2 19 18 17 12 15 14 20 21 22 23 3 1 11 10 4 5 6 7 10 k  0.1  f 0.1  f 820 pf r wr  3.9 k  5 v 5 v 3 v 0.1  f a a r l  120  sw.
TA8496FL 2002-01-31 8 3. gain characteristics (g h , g 2 , g 3 ) , power off-set voltage (v hos , v 2os , v 3os ) g h  20 og  v hdout v hdin , g 2  20 og  v aout2 v in2 , g 3  20 og  v aout3 v in3 when off-set voltage is measured, sw turns on. v hos  |v hdout |, v 2os  |v aout2 |, v 3os  |v aout3 | 4. amp 3 output voltage range (v 3ol , v 3oh ) , amp 3 output current (i 3out , i 3in ) note 3: i 3out must be measured on condition in v io   4.0 v 13 6 v cc v bat hdfb hdout ain2 fcnt aout2 ain3 rdgnd cfil wrgnd TA8496FL 9 2 19 18 17 12 15 14 1 11 10 10 k  0.1  f 0.1  f 820 pf 5 v 3 v 0.1  f r/w on/off 7 5 v aout3 ahdin acom 21 20 i 3in v cc a 2 ma v v v io 10 k  v 30h v v 30l 100  a (note3) v cc v bat hdfb hdout ain2 fcnt aout2 ain3 rdgnd cfil wrcnt wrgnd aout3 ahdin acom r/w on/off TA8496FL 9 2 19 18 17 12 15 14 13 21 20 3 1 11 10 6 7 v 10 k  0.1  f 820 pf r wr  5 k  5 v 5 v 3 v v aout3 v in2 v hdout v acom sw. v v in3 v aout2 sw. v v hdin v sw.
TA8496FL 2002-01-31 9 5. set output current (i oc ) set r wr so that i oc  10 ma (at v bat  2 v). at this time, due to fluctuation in samples, i oc fluctuates in the range of 8 to 12 ma. also, i oc fluctuates depending on the power supply (v bat ) as follows: i oc  10 ma (at v bat  2 v)  i oc  13 ma (at v bat  5 v). v cc v bat rdgnd wrcnt wrgnd hdin com clk ena r/w on/off TA8496FL i oc 9 2 22 23 3 1 11 4 5 6 7 a r wr 5 v 5 v 2 v/5 v r l  120 
TA8496FL 2002-01-31 10 6. clk, ena output propagation time (t plh1/2 , t phl1/2 , t pzh1/2 , t phz1/2 ) v cc v bat hdfb hdout ain2 fcnt aout2 ain3 rdgnd cfil wrcnt wrgnd acom ahdin hdin com clk ena r/w on/off TA8496FL 9 2 19 18 17 12 15 14 20 21 22 23 3 1 11 10 4 5 6 7 10 k  0.1  f 0.1  f 820 pf r wr 5 v 5 v 3 v 0.1  f c l  10 pf current probe r wr : i oc is set 10 ma. r l  36  clk input voltage waveform 50% 50% output current waveform 10% 90% 10 ma  10 ma gnd 90% 10% t phl1 t phl2 t phz2 t phz1 10% 90% 10% 90% 10% 10% 90% t phz2 t phz1 ena input voltage waveform 50% t plh1 t plh2 50% t pzh2 t pzh1 90% t pzh2 t pzh1 10 ma  10 ma gnd
TA8496FL 2002-01-31 11 example of application circuit note 4: operating supply voltage range v cc  3.5 to 7.0 v, v bat  1.8 to 7.0 v however, set v cc so that v acom   v bat  0.5 v. v cc   v bat . (v acom  (v cc  vf  0.3)/2) by connecting a resistor to the comin pin, v acom can be varied. note 5: the ic may be damaged by shorts between pins, to the power supply, or to ground. take great care when designing lines. 30 k  v cc  v f  0.3 v amp3 amp2 head-amp com-amp wrcnt ain3 cfil a out3 3 14 10 13 high-switch control block aout2 15 fcnt 12 t1 16 ain2 17 hdout 18 hdfb 19 v cc 9 v ref 24 comin 8 on/off 7 r/w 6 en a 5 cl k 4 a hdin 21 a com 20 v bat 2 hdin 22 com 23 wrgnd 1 rdgnd 11 control block 30 db 20 db 20 db 40 db filter 30 k  10 k  100 k  100 k  316 k  10 k  10 k  100  0.1  f 820 pf 0.25 v (typ.) 3.5 to 7.0 v 0.1  f 1.8 to 7.0 v cpu 0.1  f a d 10 k  head
TA8496FL 2002-01-31 12 requests concerning use of qon outline drawing of package when using qon, please take into account the following items. caution (1) do not carry out soldering on the island section in the four corners of the package (the section shown on the lower surface drawing with diagonal lines) with the aim of increasing mechanical strength. (2) the island section exposed on the package surface (the section shown on the upper surface drawing with diagonal lines) must be used as (note 6) below while electrically insulated from outside. note 6: ensure that the island section (the section shown on the lower surface drawing with diagonal lines) does not come into contact with solder from through-holes on the board layout.  when mounting or soldering, take care to ensure that neither static electricity nor electrical overstress is applied to the ic (measures to prevent anti-static, leaks, etc.).  when incorporating into a set, adopt a set design that does not apply voltage directly to the island section. (upper surface) (lower surface)
TA8496FL 2002-01-31 13 package dimensions weight: 0.05 g (typ.)
TA8496FL 2002-01-31 14  toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handling guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc..  the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk.  the products described in this document are subject to the foreign exchange and foreign trade laws.  the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation or others.  the information contained herein is subject to change without notice. 000707eb a restrictions on product use


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